Search results for “74AUC1G74”

SN74AUC1G74DCUR from Texas Instruments is a Integrated Circuit Single Positive-Edge-Triggered D-Type Flip-Flop with Clear and Preset - D-type flip-flops. This single positive-edge-triggered D-type flip-flop is operational at 0.8-V to 2.7-V V CC, but is designed specifically for 1.65-V to 1.95-V V CC operation. A low level at the preset (PRE) or clear (CLR) input sets or resets the outputs, regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not related directly to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs. To better optimize the flip-flop for higher frequencies, the CLR input overrides the PRE input when they are both low. NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using I off. The I off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

SN74AUC1G74YZTR from Texas Instruments is a D FLIP-FLOP, AUC SERIES

SN74AUC1G74RSER from Texas Instruments is a IC FF D-TYPE SNGL 1BIT 8UQFN

SN74AUC1G74DCURG4 from Texas Instruments is a Integrated Circuit Single Positive-Edge-Triggered D-Type Flip-Flop with Clear and Preset - D-type flip-flops. This single positive-edge-triggered D-type flip-flop is operational at 0.8-V to 2.7-V V CC, but is designed specifically for 1.65-V to 1.95-V V CC operation. A low level at the preset (PRE) or clear (CLR) input sets or resets the outputs, regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not related directly to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs. To better optimize the flip-flop for higher frequencies, the CLR input overrides the PRE input when they are both low. NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using I off. The I off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

SN74AUC1G74YZPR from Texas Instruments is a IC FF D-TYPE SNGL 1BIT 8DSBGA

SN74AUC1G74DCURE4 from Texas Instruments is a Integrated Circuit Single Positive-Edge-Triggered D-Type Flip-Flop with Clear and Preset - D-type flip-flops. This single positive-edge-triggered D-type flip-flop is operational at 0.8-V to 2.7-V V CC, but is designed specifically for 1.65-V to 1.95-V V CC operation. A low level at the preset (PRE) or clear (CLR) input sets or resets the outputs, regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not related directly to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs. To better optimize the flip-flop for higher frequencies, the CLR input overrides the PRE input when they are both low. NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using I off. The I off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

SN74AUC1G74DCTR from Texas Instruments is a Integrated Circuit Single Positive-Edge-Triggered D-Type Flip-Flop with Clear and Preset - D-type flip-flops. This single positive-edge-triggered D-type flip-flop is operational at 0.8-V to 2.7-V V CC, but is designed specifically for 1.65-V to 1.95-V V CC operation. A low level at the preset (PRE) or clear (CLR) input sets or resets the outputs, regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not related directly to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs. To better optimize the flip-flop for higher frequencies, the CLR input overrides the PRE input when they are both low. NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using I off. The I off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

SN74AUC1G74YEPR from Texas Instruments is a Integrated Circuit FF D-TYPE SNGL 1BIT 8DSBGA