Search results for “74LVC646”

74LVC646ADB,118 from NXP USA Inc. is a IC TXRX NON-INVERT 3.6V 24SSOP

The 74LVC646ADB,112 from NXP USA Inc. is a non-inverting transceiver Integrated Circuit rated 3.6 V, in a 24-SSOP package.

The 74LVC646AD,118 from NXP USA Inc. is a non-inverting transceiver Integrated Circuit with 1 element of 8 bits per element, 3-state output, and a 3.6 V rating, in a 24-SO package.

The 74LVC646AD,112 from NXP USA Inc. is a non-inverting transceiver with 1 element, 8 bits per element, a 3-state output and a 3.6 V rating, in a 24-SO package.

The SN74LVC646ADWRG4 from Texas Instruments is a non-inverting transceiver Integrated Circuit rated to 3.6 V, in a 24-SOIC package.

The SN74LVC646ANSRE4 from Texas Instruments is a non-inverting transceiver Integrated Circuit with 1 element, 8 bits per element and 3-state output, rated 3.6 V, in a 24-SO package.

The SN74LVC646ADWR from Texas Instruments is a non-inverting transceiver with 1 element of 8 bits and 3-state outputs, rated 3.6 V, in a 24-SOIC package.

The SN74LVC646ADWG4 from Texas Instruments is a non-inverting transceiver Integrated Circuit with 1 element, 8 bits per element and 3-state outputs, rated 3.6 V, in a 24-SOIC package.

SN74LVC646ADBR from Texas Instruments is a Integrated Circuit Octal Bus Transceiver And Register With 3-State Outputs - General-purpose transceivers. The SN54LVC646A octal bus transceiver and register is designed for 2.7-V to 3.6-V V CC operation, and the SN74LVC646A octal bus transceiver and register is designed for 1.65-V to 3.6-V V CC operation. These devices consist of bus-transceiver circuits, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus is clocked into the registers on the low-to-high transition of the appropriate clock (CLKAB or CLKBA) input. Figure 1 illustrates the four fundamental bus-management functions that are performed with the ’LVC646A devices. Output-enable (OE) and direction-control (DIR) inputs control the transceiver functions. In the transceiver mode, data present at thehigh-impedance port is stored in either register or in both. The select-control (SAB and SBA) inputs can multiplex stored and real-time (transparent mode) data. DIR determines which bus receives data when OE is low. In the isolation mode (OE high), A data is stored in one register and B data can be stored in the other register. When an output function is disabled, the input function is still enabled and can be used to store and transmit data. Only one of the two buses, A or B, can be driven at a time. Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment. These devices are fully specified for partial-power-down applications using I off. The I off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. To ensure the high-impedance state during power up or power down, OE should be tied to V CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN74LVC646ADWRE4 from Texas Instruments is a non-inverting transceiver Integrated Circuit with 1 element, 8 bits per element and 3-state outputs, rated to 3.6 V, in a 24-SOIC package.

The SN74LVC646ADW from Texas Instruments is a non-inverting transceiver Integrated Circuit with 1 element of 8 bits each and 3-state outputs, rated at 3.6 V, in a 24-SOIC package.

The SN74LVC646ANSR from Texas Instruments is a non-inverting transceiver Integrated Circuit rated 3.6 V, in a 24-SO package.

The SN74LVC646ANSRG4 from Texas Instruments is a non-inverting transceiver Integrated Circuit with 1 element, 8 bits per element and 3-state outputs, rated 3.6 V, in a 24-SO package.

SN74LVC646APWR from Texas Instruments is a Integrated Circuit Octal Bus Transceiver And Register With 3-State Outputs - General-purpose transceivers. The SN54LVC646A octal bus transceiver and register is designed for 2.7-V to 3.6-V V CC operation, and the SN74LVC646A octal bus transceiver and register is designed for 1.65-V to 3.6-V V CC operation. These devices consist of bus-transceiver circuits, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus is clocked into the registers on the low-to-high transition of the appropriate clock (CLKAB or CLKBA) input. Figure 1 illustrates the four fundamental bus-management functions that are performed with the ’LVC646A devices. Output-enable (OE) and direction-control (DIR) inputs control the transceiver functions. In the transceiver mode, data present at thehigh-impedance port is stored in either register or in both. The select-control (SAB and SBA) inputs can multiplex stored and real-time (transparent mode) data. DIR determines which bus receives data when OE is low. In the isolation mode (OE high), A data is stored in one register and B data can be stored in the other register. When an output function is disabled, the input function is still enabled and can be used to store and transmit data. Only one of the two buses, A or B, can be driven at a time. Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment. These devices are fully specified for partial-power-down applications using I off. The I off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. To ensure the high-impedance state during power up or power down, OE should be tied to V CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

SN74LVC646APW from Texas Instruments is a Integrated Circuit Octal Bus Transceiver And Register With 3-State Outputs - General-purpose transceivers. The SN54LVC646A octal bus transceiver and register is designed for 2.7-V to 3.6-V V CC operation, and the SN74LVC646A octal bus transceiver and register is designed for 1.65-V to 3.6-V V CC operation. These devices consist of bus-transceiver circuits, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus is clocked into the registers on the low-to-high transition of the appropriate clock (CLKAB or CLKBA) input. Figure 1 illustrates the four fundamental bus-management functions that are performed with the ’LVC646A devices. Output-enable (OE) and direction-control (DIR) inputs control the transceiver functions. In the transceiver mode, data present at thehigh-impedance port is stored in either register or in both. The select-control (SAB and SBA) inputs can multiplex stored and real-time (transparent mode) data. DIR determines which bus receives data when OE is low. In the isolation mode (OE high), A data is stored in one register and B data can be stored in the other register. When an output function is disabled, the input function is still enabled and can be used to store and transmit data. Only one of the two buses, A or B, can be driven at a time. Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment. These devices are fully specified for partial-power-down applications using I off. The I off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. To ensure the high-impedance state during power up or power down, OE should be tied to V CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.