Search results for “74LVC652”

The SN74LVC652ADWE4 from Texas Instruments is a non-inverting transceiver with 1 element of 8 bits and 3-state outputs, rated 3.6 V, in a 24-SOIC package.

The SN74LVC652ANSRG4 from Texas Instruments is a non-inverting transceiver with 1 element of 8 bits and 3-state outputs, rated 3.6 V, in a 24-SO package.

The SN74LVC652ADWR from Texas Instruments is a non-inverting transceiver Integrated Circuit with 1 element, 8 bits per element, 3-state outputs and a 3.6 V rating, in a 24-SOIC package.

The SN74LVC652ADW from Texas Instruments is a non-inverting transceiver with 1 element, 8 bits per element and 3-state outputs, rated 3.6 V, in a 24-SOIC package.

SN74LVC652DW from Texas Instruments is a REGISTERED BUS TRANSCEIVER

SN74LVC652APWT from Texas Instruments is a Integrated Circuit Octal Bus Transceiver And Register With 3-State Outputs - General-purpose transceivers. The SN54LVC652A octal bus transceiver and register is designed for 2.7-V to 3.6-V V CC operation, and the SN74LVC652A octal bus transceiver and register is designed for 1.65-V to 3.6-V V CC operation. These devices consist of bus transceiver circuits, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers. Output-enable (OEAB and OEBA) inputs are provided to control the transceiver functions. Select-control (SAB and SBA) inputs are provided to select whether real-time or stored data is transferred. The circuitry used for select control eliminates the typical decoding glitch that occurs in a multiplexer during the transition between stored and real-time data. A low input selects real-time data, and a high input selects stored data. Figure 1 illustrates the four fundamental bus-management functions that are performed with the ’LVC652A devices. Data on the A or B data bus, or both, is stored in the internal D-type flip-flops by low-to-high transitions at the appropriate clock (CLKAB or CLKBA) inputs, regardless of the select- or enable-control pins. When SAB and SBA are in the real-time transfer mode, it is possible to store data without using the internal D-type flip-flops by simultaneously enabling OEAB and OEBA. In this configuration, each output reinforces its input. When all other data sources to the two sets of bus lines are at high impedance, each set of bus lines remains at its last state. Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment. These devices are fully specified for partial-power-down applications using I off. The I off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. To ensure the high-impedance state during power up or power down, OEBA should be tied to V CC through a pullup resistor and OEAB should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sinking/current-sourcing capability of the driver.

The SN74LVC652ANSRE4 from Texas Instruments is a non-inverting transceiver with 1 element of 8 bits each and 3-state outputs, with a 3.6 V rating, in a 24-SO package.

SN74LVC652APWR from Texas Instruments is a Integrated Circuit Octal Bus Transceiver And Register With 3-State Outputs - General-purpose transceivers. The SN54LVC652A octal bus transceiver and register is designed for 2.7-V to 3.6-V V CC operation, and the SN74LVC652A octal bus transceiver and register is designed for 1.65-V to 3.6-V V CC operation. These devices consist of bus transceiver circuits, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers. Output-enable (OEAB and OEBA) inputs are provided to control the transceiver functions. Select-control (SAB and SBA) inputs are provided to select whether real-time or stored data is transferred. The circuitry used for select control eliminates the typical decoding glitch that occurs in a multiplexer during the transition between stored and real-time data. A low input selects real-time data, and a high input selects stored data. Figure 1 illustrates the four fundamental bus-management functions that are performed with the ’LVC652A devices. Data on the A or B data bus, or both, is stored in the internal D-type flip-flops by low-to-high transitions at the appropriate clock (CLKAB or CLKBA) inputs, regardless of the select- or enable-control pins. When SAB and SBA are in the real-time transfer mode, it is possible to store data without using the internal D-type flip-flops by simultaneously enabling OEAB and OEBA. In this configuration, each output reinforces its input. When all other data sources to the two sets of bus lines are at high impedance, each set of bus lines remains at its last state. Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment. These devices are fully specified for partial-power-down applications using I off. The I off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. To ensure the high-impedance state during power up or power down, OEBA should be tied to V CC through a pullup resistor and OEAB should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sinking/current-sourcing capability of the driver.

The SN74LVC652DBLE from Texas Instruments is a registered bus transceiver Integrated Circuit.

SN74LVC652ANSR from Texas Instruments is a Integrated Circuit TXRX NON-INVERT 3.6V 24SO

SN74LVC652APW from Texas Instruments is a Integrated Circuit Octal Bus Transceiver And Register With 3-State Outputs - General-purpose transceivers. The SN54LVC652A octal bus transceiver and register is designed for 2.7-V to 3.6-V V CC operation, and the SN74LVC652A octal bus transceiver and register is designed for 1.65-V to 3.6-V V CC operation. These devices consist of bus transceiver circuits, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers. Output-enable (OEAB and OEBA) inputs are provided to control the transceiver functions. Select-control (SAB and SBA) inputs are provided to select whether real-time or stored data is transferred. The circuitry used for select control eliminates the typical decoding glitch that occurs in a multiplexer during the transition between stored and real-time data. A low input selects real-time data, and a high input selects stored data. Figure 1 illustrates the four fundamental bus-management functions that are performed with the ’LVC652A devices. Data on the A or B data bus, or both, is stored in the internal D-type flip-flops by low-to-high transitions at the appropriate clock (CLKAB or CLKBA) inputs, regardless of the select- or enable-control pins. When SAB and SBA are in the real-time transfer mode, it is possible to store data without using the internal D-type flip-flops by simultaneously enabling OEAB and OEBA. In this configuration, each output reinforces its input. When all other data sources to the two sets of bus lines are at high impedance, each set of bus lines remains at its last state. Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment. These devices are fully specified for partial-power-down applications using I off. The I off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. To ensure the high-impedance state during power up or power down, OEBA should be tied to V CC through a pullup resistor and OEAB should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sinking/current-sourcing capability of the driver.