Search results for “74LVC821”
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74LVC821ADB,112
NXP USA Inc.74LVC821ADB,112 from NXP USA Inc. is a IC FF D-TYPE SNGL 10BIT 24SSOP
View full details74LVC821ADB,118
NXP USA Inc.74LVC821ADB,118 from NXP USA Inc. is a IC FF D-TYPE SNGL 10BIT 24SSOP
View full details74LVC821ABQ,118
NXP USA Inc.74LVC821ABQ,118 from NXP USA Inc. is a IC FF D-TYPE SNGL 10BIT 24DHVQFN
View full details74LVC821ABQ,115
NXP USA Inc.74LVC821ABQ,115 from NXP USA Inc. is a IC FF D-TYPE SNGL 10BIT 24DHVQFN
View full details74LVC821AD,118
NXP USA Inc.74LVC821AD,118 from NXP USA Inc. is a IC FF D-TYPE SNGL 10BIT 24SO
View full details74LVC821AEPY
IDT, Integrated Device Technology Inc74LVC821AEPY from IDT, Integrated Device Technology Inc is a 74LVC821 -
View full details74LVC821APW,112
NXP USA Inc.74LVC821APW,112 from NXP USA Inc. is a IC FF D-TYPE SNGL 10BIT 24TSSOP
View full details74LVC821AD,112
NXP USA Inc.74LVC821AD,112 from NXP USA Inc. is a IC FF D-TYPE SNGL 10BIT 24SO
View full detailsSN74LVC821ADBRG4
Texas InstrumentsSN74LVC821ADBRG4 from Texas Instruments is a Integrated Circuit FF D-TYPE SNGL 10BIT 24SSOP
View full detailsSN74LVC821ADBR
Texas InstrumentsSN74LVC821ADBR from Texas Instruments is a Integrated Circuit 10-Bit Bus-Interface Flip-Flop With 3-State Outputs - D-type flip-flops. This 10-bit bus-interface flip-flop is designed for 1.65-V to 3.6-V V CC operation. The SN74LVC821A features 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. This device is particularly suitable for implementing wider buffer registers, I/O ports, bidirectional bus drivers with parity, and working registers. The ten flip-flops are edge-triggered D-type flip-flops. On the positive transition of the clock (CLK) input, the device provides true data at the Q outputs. A buffered output-enable (OE) input can be used to place the ten outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components. OE does not affect the internal operations of the latch. Previously stored data can be retained or new data can be entered while the outputs are in the high-impedance state. Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V/5-V system environment. This device is fully specified for partial-power-down applications using I off. The I off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. To ensure the high-impedance state during power up or power down, OE should be tied to V CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
View full detailsSN74LVC821ADGVR
Texas InstrumentsSN74LVC821ADGVR from Texas Instruments is a IC FF D-TYPE SNGL 10BIT 24TVSOP
View full detailsSN74LVC821APWR
Texas InstrumentsSN74LVC821APWR from Texas Instruments is a Integrated Circuit 10-Bit Bus-Interface Flip-Flop With 3-State Outputs - D-type flip-flops. This 10-bit bus-interface flip-flop is designed for 1.65-V to 3.6-V V CC operation. The SN74LVC821A features 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. This device is particularly suitable for implementing wider buffer registers, I/O ports, bidirectional bus drivers with parity, and working registers. The ten flip-flops are edge-triggered D-type flip-flops. On the positive transition of the clock (CLK) input, the device provides true data at the Q outputs. A buffered output-enable (OE) input can be used to place the ten outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components. OE does not affect the internal operations of the latch. Previously stored data can be retained or new data can be entered while the outputs are in the high-impedance state. Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V/5-V system environment. This device is fully specified for partial-power-down applications using I off. The I off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. To ensure the high-impedance state during power up or power down, OE should be tied to V CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
View full detailsSN74LVC821ADWG4
Texas InstrumentsSN74LVC821ADWG4 from Texas Instruments is a IC FF D-TYPE SNGL 10BIT 20SOIC
View full detailsSN74LVC821ANSRE4
Texas InstrumentsSN74LVC821ANSRE4 from Texas Instruments is a IC FF D-TYPE SNGL 10BIT 24SO
View full detailsSN74LVC821ADW
Texas InstrumentsSN74LVC821ADW from Texas Instruments is a IC FF D-TYPE SNGL 10BIT 20SOIC
View full detailsSN74LVC821ADWR
Texas InstrumentsSN74LVC821ADWR from Texas Instruments is a IC FF D-TYPE SNGL 10BIT 20SOIC
View full detailsSN74LVC821PWR
Texas InstrumentsSN74LVC821PWR from Texas Instruments is a BUS DRIVER, LVC/LCX/Z SERIES
View full detailsSN74LVC821APWT
Texas InstrumentsSN74LVC821APWT from Texas Instruments is a Integrated Circuit 10-Bit Bus-Interface Flip-Flop With 3-State Outputs - D-type flip-flops. This 10-bit bus-interface flip-flop is designed for 1.65-V to 3.6-V V CC operation. The SN74LVC821A features 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. This device is particularly suitable for implementing wider buffer registers, I/O ports, bidirectional bus drivers with parity, and working registers. The ten flip-flops are edge-triggered D-type flip-flops. On the positive transition of the clock (CLK) input, the device provides true data at the Q outputs. A buffered output-enable (OE) input can be used to place the ten outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components. OE does not affect the internal operations of the latch. Previously stored data can be retained or new data can be entered while the outputs are in the high-impedance state. Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V/5-V system environment. This device is fully specified for partial-power-down applications using I off. The I off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. To ensure the high-impedance state during power up or power down, OE should be tied to V CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
View full detailsSN74LVC821ANSR
Texas InstrumentsSN74LVC821ANSR from Texas Instruments is a IC FF D-TYPE SNGL 10BIT 24SO
View full detailsSN74LVC821PWLE
Texas InstrumentsSN74LVC821PWLE from Texas Instruments is a BUS DRIVER, LVC/LCX/Z SERIES
View full detailsSN74LVC821DBR
Texas InstrumentsSN74LVC821DBR from Texas Instruments is a BUS DRIVER, LVC/LCX/Z SERIES
View full detailsSN74LVC821ANSRG4
Texas InstrumentsSN74LVC821ANSRG4 from Texas Instruments is a Integrated Circuit FF D-TYPE SNGL 10BIT 24SO
View full detailsSN74LVC821APW
Texas InstrumentsSN74LVC821APW from Texas Instruments is a Integrated Circuit 10-Bit Bus-Interface Flip-Flop With 3-State Outputs - D-type flip-flops. This 10-bit bus-interface flip-flop is designed for 1.65-V to 3.6-V V CC operation. The SN74LVC821A features 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. This device is particularly suitable for implementing wider buffer registers, I/O ports, bidirectional bus drivers with parity, and working registers. The ten flip-flops are edge-triggered D-type flip-flops. On the positive transition of the clock (CLK) input, the device provides true data at the Q outputs. A buffered output-enable (OE) input can be used to place the ten outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components. OE does not affect the internal operations of the latch. Previously stored data can be retained or new data can be entered while the outputs are in the high-impedance state. Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V/5-V system environment. This device is fully specified for partial-power-down applications using I off. The I off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. To ensure the high-impedance state during power up or power down, OE should be tied to V CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
View full detailsSN74LVC821DW
Texas InstrumentsSN74LVC821DW from Texas Instruments is a 10-BIT BUS INTERFACE FLIP-FLOP W
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