Universal Bus Functions

The SN74LVTH18511DGGR from Texas Instruments is an 18-bit universal bus transceiver Integrated Circuit in a 48-TSSOP package.

The SN74VMEH22501GQLR from Texas Instruments is an 8-bit and dual 1-bit universal bus transceiver in a 56-BGA Microstar Junior (7x4.5) package.

The SN74LVTH18512DGGR from Texas Instruments is an 18-bit scan test universal bus transceiver in a 64-TSSOP package.

The 74ABTH18504APMRG4 from Texas Instruments is a 20-bit scan test universal bus transceiver in a 64-LQFP (10x10) package.

The 74ALVCH16334DGVRE4 from Texas Instruments is a 16-bit universal bus driver Integrated Circuit in a 48-TVSOP package.

The 74GTLPH16916VRE4 from Texas Instruments is a 17-bit universal bus transceiver Integrated Circuit in a 56-TVSOP package.

The 74LVTH18511DGGRE4 from Texas Instruments is an 18-bit universal bus transceiver Integrated Circuit in a 64-TSSOP package.

The 74GTLPH1612DGGRE4 from Texas Instruments is an 18-bit universal bus transceiver Integrated Circuit in a 64-TSSOP package.

The SN74VMEH22501AZQLR from Texas Instruments is a universal bus transceiver Integrated Circuit in a 56-BGA package.

The 74ALVCH16334DGVRG4 from Texas Instruments is a universal bus driver Integrated Circuit with 16 bits in a 48-TVSOP package.

The 74ALVCH162268ZQLR from Texas Instruments is a registered bus exchanger with 12 to 24 bits in a 56-BGA Microstar Junior (7x4.5) package.

The 74ALVCH16269ZQLR from Texas Instruments is a registered bus exchanger with 12 to 24 bits in a 56-BGA Microstar Junior (7x4.5) package.

74FCT162H501CTPACT from Texas Instruments is a Integrated Circuit 18-Bit Universal Bus Transceivers with Bus-Hold and 3-State Outputs - General-purpose transceivers. These 18-bit universal bus transceivers can be operated in transparent, latched or clock modes by combining D-type latches and D-type flip-flops. Data flow in each direction is controlled by output enable (OEAB and OEBA), latch enable (LEAB and LEBA), and clock inputs (CLKAB and CLKBA). For A-to-B data flow, the device operates in transparent mode when LEAB is HIGH. When LEAB is LOW, the A data is latched if CLKAB is held at a HIGH or LOWlogic level. If LEAB is LOW, the A bus data is stored in the latch/flip-flop on the LOW-to-HIGH transition of CLKAB. OEAB performs the output enable function on the B port. Data flow from B-to-A is similar to that of A-to-B and is controlled by OEBA, LEBA, and CLKBA. This device is fully specified for partial-power-down applications using I off. The I off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The CY74FCT16501T is ideally suited for driving high-capacitance loads and low-impedance backplanes. The CY74FCT162501T has 24-mA balanced output drivers with current limiting resistors in the outputs. This reduces the need for external terminating resistors and provides for minimal undershoot and reduced ground bounce. The CY74FCT162501T is ideal for driving transmission lines. The CY74FCT162H501T is a 24-mA balanced output part, that has "bus hold" on the data inputs. The device retains the inputx92s last state whenever the input goes to high impedance. This eliminates the need for pull-up/down resistors and prevents floating inputs.

The 74ALVCH16501ZQLR from Texas Instruments is a universal bus transceiver Integrated Circuit with 18 bits in a 56-BGA Microstar Junior (7x4.5) package.

The SN74VMEH22501DGVR from Texas Instruments is a universal bus transceiver with 8-bit and dual 1-bit configuration in a 48-TVSOP package.