Universal Bus Functions

The 74VCX16601MTD from Fairchild Semiconductor is an 18-bit registered bus transceiver in a 56-TSSOP package.

The 74LCX16500GX from onsemi is an 18-bit low-voltage universal bus transceiver in a 54-FBGA (5.5x8) package.

The 74HC299PW,112 from Nexperia USA Inc. is an 8-bit universal shift register in a 20-TSSOP package.

The SN74LVTH16501DGG from Texas Instruments is a registered bus transceiver Integrated Circuit.

The GTLP10B320MTD from onsemi is a 10-bit universal bus driver Integrated Circuit in a 56-TSSOP package.

The ALVCHR162269ADGGR from Texas Instruments is a universal bus exchange switch Integrated Circuit.

The GTLP16T1655MTDX from Fairchild Semiconductor is a registered universal bus transceiver Integrated Circuit with 16 bits, in a 64-TSSOP package.

The CY74FCT16501ETPAC from Texas Instruments is a bus transceiver Integrated Circuit from the FCT series.

The SCANH162602SM/NOPB from Texas Instruments is a 16-bit universal bus transceiver Integrated Circuit in a 64-NFBGA (8x8) package.

The SN74ABTH182502APM from Texas Instruments is an 18-bit scan test universal bus transceiver in a 64-LQFP (10x10) package.

SN74ABT16601DL from Texas Instruments is a Integrated Circuit 18-bit universal bus transceivers with 3-state outputs - General-purpose transceivers. These 18-bit universal bus transceivers combine D-type latches and D-type flip-flops to allow data flow in transparent, latched, clocked, and clock-enabled modes. Data flow in each direction is controlled by output-enable (and), latch-enable (LEAB and LEBA), and clock (CLKAB and CLKBA) inputs. The clock can be controlled by the clock-enable (and) inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is high. When LEAB is low, the A data is latched if CLKAB is held at a high or low logic level. If LEAB is low, the A data is stored in the latch/flip-flop on the low-to-high transition of CLKAB. Output enable is active low. When is low, the outputs are active. When is high, the outputs are in the high-impedance state. Data flow for B to A is similar to that of A to B, but uses, LEBA, CLKBA, and. To ensure the high-impedance state during power up or power down, should be tied to V CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. The SN54ABT16601 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT16601 is characterized for operation from -40°C to 85°C.

SN74ABT16500BDLR from Texas Instruments is a Integrated Circuit 18-bit universal bus transceivers with 3-state outputs - General-purpose transceivers. These 18-bit universal bus transceivers combine D-type latches and D-type flip-flops to allow data flow in transparent, latched, and clocked modes. Data flow in each direction is controlled by output-enable (OEAB and OEBA), latch-enable (LEAB and LEBA), and clock (CLKAB and CLKBA) inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is high. When LEAB is low, the A data is latched if CLKAB is held at a high or low logic level. If LEAB is low, the A data is stored in the latch/flip-flop on the high-to-low transition of CLKAB. OEAB is active-high. When OEAB is high, the outputs are active. When OEAB is low, the outputs are in the high-impedance state. Data flow for B to A is similar to that of A to B but uses OEBA, LEBA, and CLKBA. The output enables are complementary (OEAB is active high and OEBA is active low). When V CC is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 2.1 V, OE should be tied to V CC through a pullup resistor and OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sinking/current-sourcing capability of the driver. The SN54ABT16500B is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT16500B is characterized for operation from -40°C to 85°C.

The SN74ALVCH162836VR from Texas Instruments is a 20-bit universal bus driver Integrated Circuit in a 56-TVSOP package.

The 74ALVCH162601DGG512 from NXP USA Inc. is a registered bus transceiver Integrated Circuit.

The 74LVC16501AX4PV from IDT, Integrated Device Technology Inc is an 18-bit registered transceiver Integrated Circuit with 3.3 V CMOS.

The SN74ALVCHR16601G from Texas Instruments is a universal bus transceiver Integrated Circuit with 18 bits, in a 56-TSSOP package.

The SN74GTLPH16912VR from Texas Instruments is an 18-bit universal bus transceiver in a 56-TVSOP package.

SN74ABT16601DGGR from Texas Instruments is a Integrated Circuit 18-bit universal bus transceivers with 3-state outputs - General-purpose transceivers. These 18-bit universal bus transceivers combine D-type latches and D-type flip-flops to allow data flow in transparent, latched, clocked, and clock-enabled modes. Data flow in each direction is controlled by output-enable (and), latch-enable (LEAB and LEBA), and clock (CLKAB and CLKBA) inputs. The clock can be controlled by the clock-enable (and) inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is high. When LEAB is low, the A data is latched if CLKAB is held at a high or low logic level. If LEAB is low, the A data is stored in the latch/flip-flop on the low-to-high transition of CLKAB. Output enable is active low. When is low, the outputs are active. When is high, the outputs are in the high-impedance state. Data flow for B to A is similar to that of A to B, but uses, LEBA, CLKBA, and. To ensure the high-impedance state during power up or power down, should be tied to V CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. The SN54ABT16601 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT16601 is characterized for operation from -40°C to 85°C.

The 74ABT16501CMTDX from onsemi is an 18-bit universal bus transceiver Integrated Circuit in a 56-TSSOP package.

The 74ALVC162334PAG from IDT, Integrated Device Technology Inc is a 16-bit universal bus driver in 3.3 V CMOS technology, in a 48-TSSOP package.

The 74ALVC162601TX from onsemi is an 18-bit universal bus transceiver Integrated Circuit in a 56-TSSOP package.

The 74ALVC162601T from onsemi is an 18-bit universal bus transceiver Integrated Circuit in a 56-TSSOP package.

SN74ABT162500DL from Texas Instruments is a Integrated Circuit 18-bit universal bus transceivers with 3-state outputs - General-purpose transceivers. These 18-bit universal bus transceivers combine D-type latches and D-type flip-flops to allow data flow in transparent, latched, and clocked modes. Data flow in each direction is controlled by output-enable (OEAB and OEBA), latch-enable (LEAB and LEBA), and clock (CLKAB and CLKBA) inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is high. When LEAB is low, the A data is latched if CLKAB is held at a high or low logic level. If LEAB is low, the A data is stored in the latch/flip-flop on the high-to-low transition of CLKAB. Output-enable OEAB is active high. When OEAB is high, the outputs are active. When OEAB is low, the outputs are in the high-impedance state. Data flow for B to A is similar to that of A to B but uses OEBA, LEBA, and CLKBA. The output enables are complementary (OEAB is active high and OEBA is active low). The B-port outputs, which are designed to source or sink up to 12 mA, include equivalent 25- series resistors to reduce overshoot and undershoot. When V CC is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 2.1 V, OE should be tied to V CC through a pullup resistor and OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sinking/current-sourcing capability of the driver. The SN54ABT162500 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT162500 is characterized for operation from -40°C to 85°C. A-to-B data flow is shown: B-to-A flow is similar but uses OEBA, LEBA, and CLKBA. Output level before the indicated steady-state input conditions were established § Output level before the indicated steady-state input conditions were established, provided that CLKAB was low before LEAB went low

The SN74ABTH32318PN from Texas Instruments is a universal bus exchanger Integrated Circuit in an 80-LQFP package.

SN74ABT16501DGGR from Texas Instruments is a Integrated Circuit 18-bit universal bus transceivers with 3-state outputs - General-purpose transceivers. These 18-bit universal bus transceivers consist of storage elements that can operate either as D-type latches or D-type flip-flops to allow data flow in transparent or clocked modes. Data flow in each direction is controlled by output-enable (OEAB and), latch-enable (LEAB and LEBA), and clock (CLKAB and CLKBA) inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is high. When LEAB is low, the A data is latched if CLKAB is held at a high or low logic level. If LEAB is low, the A data is stored in the latch/flip-flop on the low-to-high transition of CLKAB. When OEAB is high, the outputs are active. When OEAB is low, the outputs are in the high-impedance state. Data flow for B to A is similar to that of A to B but uses, LEBA, and CLKBA. The output enables are complementary (OEAB is active high and is active low). To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor and should be tied to V CC through a pullup resistor; the minimum value of the resistor is determined by the current-sourcing/current-sinking capability of the driver. The SN54ABT16501 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT16501 is characterized for operation from -40°C to 85°C.

SN74GTL16612DGGR from Texas Instruments is a Integrated Circuit 18-Bit LVTTL-to-GTL/GTL+ Universal Bus Transceivers - Voltage translators. The 'GTL16612 devices are 18-bit UBT™ transceivers that provide LVTTL-to-GTL/GTL+ and GTL/GTL+-to-LVTTL signal-level translation. They combine D-type flip-flops and D-type latches to allow for transparent, latched, clocked, and clock-enabled modes of data transfer identical to the '16601 function. The devices provide an interface between cards operating at LVTTL logic levels and a backplane operating at GTL/GTL+ signal levels. Higher-speed operation is a direct result of the reduced output swing (<1 V), reduced input threshold levels, and OEC™ circuitry. The user has the flexibility of using these devices at either GTL (V TT = 1.2 V and V REF = 0.8 V) or the preferred higher noise margin GTL+ (V TT = 1.5 V and V REF = 1 V) signal levels. GTL+ is the Texas Instruments derivative of the Gunning Transceiver Logic (GTL) JEDEC standard JESD 8-3. The B port normally operates at GTL or GTL+ signal levels, while the A-port and control inputs are compatible with LVTTL logic levels and are 5-V tolerant. V REF is the reference input voltage for the B port. V CC (5 V) supplies the internal and GTL circuitry while V CC (3.3 V) supplies the LVTTL output buffers. Data flow in each direction is controlled by output-enable (OEAB and OEBA), latch-enable(LEAB and LEBA), and clock (CLKAB and CLKBA) inputs. The clock can be controlled by the clock-enable (CEAB and CEBA) inputs. For A-to-B data flow, the devices operate in the transparent mode when LEAB is high. When LEAB is low, the A data is latched if CEAB is low and CLKAB is held at a high or low logic level. If LEAB is low, the A data is stored in the latch/flip-flop on the low-to-high transition of CLKAB if CEAB also is low. When OEAB is low, the outputs are active. When OEAB is high, the outputs are in the high-impedance state. Data flow for B to A is similar to that for A to B, but uses OEBA, LEBA, CLKBA, and CEBA. These devices are fully specified for partial-power-down applications using I off. The I off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. Active bus-hold circuitry holds unused or undriven LVTTL inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

The SN74GTLPH32912KR from Texas Instruments is a 36-bit universal bus transceiver in a 114-BGA MICROSTAR (16x5.5) package.

The SN74AUC16501DGVR from Texas Instruments is an 18-bit universal bus transceiver Integrated Circuit in a 56-TVSOP package.

SN74ALVCH162601GR from Texas Instruments is a Integrated Circuit 18-Bit Universal Bus Transceiver With 3-State Outputs - General-purpose transceivers. This 18-bit universal bus transceiver is designed for 1.65-V to 3.6-V V CC operation. The SN74ALVCH162601 combines D-type latches and D-type flip-flops to allow data flow in transparent, latched, clocked, and clock-enabled modes. Data flow in each direction is controlled by output-enable (OEAB and OEBA), latch-enable (LEAB and LEBA), and clock (CLKAB and CLKBA) inputs. The clock can be controlled by the clock-enable (CLKENAB and CLKENBA) inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is high. When LEAB is low, the A data is latched if CLKAB is held at a high or low logic level. If LEAB is low, the A data is stored in the latch/flip-flop on the low-to-high transition of CLKAB. When OEAB is low, the outputs are active. When OEAB is high, the outputs are in the high-impedance state. Data flow for B to A is similar to that of A to B, but uses OEBA, LEBA, CLKBA, and CLKENBA. The B-port outputs include equivalent 26- series resistors to reduce overshoot and undershoot. To ensure the high-impedance state during power up or power down, OE should be tied to V CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. The SN74ALVCH162601 is characterized for operation from -0°C to 85°C.

The SN74ALVCH16601DGVR from Texas Instruments is a universal bus transceiver with 18 bits in a 56-TVSOP package.