Universal Bus Functions

SN74ALVC162836DL from Texas Instruments is a Integrated Circuit 20-Bit Universal Bus Driver With 3-State Outputs - General-purpose transceivers. This 20-bit universal bus driver is designed for 1.65-V to 3.6-V V CC operation. Data flow from A to Y is controlled by the output-enable (OE) input. The device operates in the transparent mode when the latch-enable (LE) input is low. When LE is high, the A data is latched if the clock (CLK) input is held at a high or low logic level. If LE is high, the A data is stored in the latch/flip-flop on the low-to-high transition of CLK. When OE is high, the outputs are in the high-impedance state. The output port includes equivalent 26- series resistors to reduce overshoot and undershoot. To ensure the high-impedance state during power up or power down, OE should be tied to V CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

SN74ALVCH16601DLR from Texas Instruments is a Integrated Circuit 18-bit universal bus transceiver with 3-state outputs - General-purpose transceivers. This 18-bit universal bus transceiver is designed for 1.65-V to 3.6-V V CC operation. The SN74ALVCH16601 combines D-type latches and D-type flip-flops to allow data flow in transparent, latched, and clocked modes. Data flow in each direction is controlled by output-enable (OEAB and OEBA), latch-enable (LEAB and LEBA), and clock (CLKAB and CLKBA) inputs. The clock can be controlled by the clock-enable (CLKENAB and CLKENBA) inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is high. When LEAB is low, the A data is latched if CLKAB is held at a high or low logic level. If LEAB is low, the A data is stored in the latch/flip-flop on the low-to-high transition of CLKAB. Output enable OEAB is active low. When OEAB is low, the outputs are active. When OEAB is high, the outputs are in the high-impedance state. Data flow for B to A is similar to that of A to B, but uses OEBA, LEBA, CLKBA, and CLKENBA. To ensure the high-impedance state during power up or power down, OE should be tied to V CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. The SN74ALVCH16601 is characterized for operation from -40°C to 85°C.

The SN74ALVC162834VR from Texas Instruments is an 18-bit universal bus driver Integrated Circuit in a 56-TVSOP package.

SN74ALVC162835DGGR from Texas Instruments is a Integrated Circuit 18-Bit Universal Bus Driver With 3-State Outputs - General-purpose transceivers. This 18-bit universal bus driver is designed for 1.65-V to 3.6-V V CC operation. Data flow from A to Y is controlled by the output-enable (OE) input. The device operates in the transparent mode when the latch-enable (LE) input is high. When LE is low, the A data is latched if the clock (CLK) input is held at a high or low logic level. If LE is low, the A data is stored in the latch/flip-flop on the low-to-high transition of CLK. When OE is high, the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE should be tied to V CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. The output port includes equivalent 26- series resistors to reduce overshoot and undershoot.

SN74ALVCH16501DL from Texas Instruments is a Integrated Circuit 18-bit universal bus transceiver with 3-state outputs - General-purpose transceivers. This 18-bit universal bus transceiver is designed for 1.65-V to 3.6-V V CC operation. Data flow in each direction is controlled by output-enable (OEAB and OEBA), latch-enable (LEAB and LEBA), and clock (CLKAB and CLKBA) inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is high. When LEAB is low, the A data is latched if CLKAB is held at a high or low logic level. If LEAB is low, the A data is stored in the latch/flip-flop on the low-to-high transition of CLKAB. When OEAB is high, the outputs are active. When OEAB is low, the outputs are in the high-impedance state. Data flow for B to A is similar to that of A to B, but uses OEBA, LEBA, and CLKBA. The output enables are complementary (OEAB is active high and OEBA is active low). To ensure the high-impedance state during power up or power down, OEBA should be tied to V CC through a pullup resistor and OEAB should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

The SN74AVC16269DGVR from Texas Instruments is a registered bus exchanger with 12 to 24 bits in a 56-TVSOP package.

SN74ABT16501DL from Texas Instruments is a Integrated Circuit 18-bit universal bus transceivers with 3-state outputs - General-purpose transceivers. These 18-bit universal bus transceivers consist of storage elements that can operate either as D-type latches or D-type flip-flops to allow data flow in transparent or clocked modes. Data flow in each direction is controlled by output-enable (OEAB and), latch-enable (LEAB and LEBA), and clock (CLKAB and CLKBA) inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is high. When LEAB is low, the A data is latched if CLKAB is held at a high or low logic level. If LEAB is low, the A data is stored in the latch/flip-flop on the low-to-high transition of CLKAB. When OEAB is high, the outputs are active. When OEAB is low, the outputs are in the high-impedance state. Data flow for B to A is similar to that of A to B but uses, LEBA, and CLKBA. The output enables are complementary (OEAB is active high and is active low). To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor and should be tied to V CC through a pullup resistor; the minimum value of the resistor is determined by the current-sourcing/current-sinking capability of the driver. The SN54ABT16501 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT16501 is characterized for operation from -40°C to 85°C.

The 74ALVCH162836VRE4 from Texas Instruments is a 20-bit universal bus driver Integrated Circuit in a 56-TVSOP package.

The 74ALVCH16903DGVRE4 from Texas Instruments is a 12-bit universal bus driver Integrated Circuit in a 56-TVSOP package.

The 74ALVCH16334DGGRG4 from Texas Instruments is a 16-bit universal bus driver Integrated Circuit in a 48-TSSOP package.

The 74ALVCH162835VRE4 from Texas Instruments is an 18-bit universal bus driver Integrated Circuit in a 56-TVSOP package.

The 74GTLPH16916VRG4 from Texas Instruments is a 17-bit universal bus transceiver Integrated Circuit in a 56-TVSOP package.

The 74LVCH16901DGGRG4 from Texas Instruments is an 18-bit universal bus transceiver Integrated Circuit in a 64-TSSOP package.

74FCT162501CTPVCT from Texas Instruments is a Integrated Circuit 18-Bit Universal Bus Transceivers with 3-State Outputs - General-purpose transceivers. These 18-bit universal bus transceivers can be operated in transparent, latched or clock modes by combining D-type latches and D-type flip-flops. Data flow in each direction is controlled by output enable (OEAB and OEBA), latch enable (LEAB and LEBA), and clock inputs (CLKAB and CLKBA). For A-to-B data flow, the device operates in transparent mode when LEAB is HIGH. When LEAB is LOW, the A data is latched if CLKAB is held at a HIGH or LOWlogic level. If LEAB is LOW, the A bus data is stored in the latch/flip-flop on the LOW-to-HIGH transition of CLKAB. OEAB performs the output enable function on the B port. Data flow from B-to-A is similar to that of A-to-B and is controlled by OEBA, LEBA, and CLKBA. This device is fully specified for partial-power-down applications using I off. The I off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The CY74FCT16501T is ideally suited for driving high-capacitance loads and low-impedance backplanes. The CY74FCT162501T has 24-mA balanced output drivers with current limiting resistors in the outputs. This reduces the need for external terminating resistors and provides for minimal undershoot and reduced ground bounce. The CY74FCT162501T is ideal for driving transmission lines. The CY74FCT162H501T is a 24-mA balanced output part, that has "bus hold" on the data inputs. The device retains the inputx92s last state whenever the input goes to high impedance. This eliminates the need for pull-up/down resistors and prevents floating inputs.

The 74LVTH18511DGGRG4 from Texas Instruments is an 18-bit universal bus transceiver Integrated Circuit supplied in a 64-TSSOP package.

The 74GTL16923DGGRE4 from Texas Instruments is an LVTTL-to-GTL/GTL+ transceiver Integrated Circuit with 18 bits, supplied in a 64-TSSOP package.